Inside Intel's Core 2 Duo
20/07/06
On July 13, 2006, a host of benchmarks were released for Intel's upcoming Conroe products, that of its desktop Core 2 Duo line. The results were absolutely stunning from a performance point of view. The high-end models bested AMD by more than 50% on some benchmarks, with AMD's highest-end chip winning only a couple of benchmarks, and even then just barely.
Core 2 Duo has hit the streets with a bang. Models will be available (including some overclocked models) sporting up to 2.93GHz clock speeds and a 4 MB shared L2 cache. Overall, Core 2 Duo is a powerful processor that will undoubtedly act as a type of solvent to remove the stains accumulated on Intel's armor throughout its Netburst days, and specifically those towards the end with Prescott. Intel seems to have a winning product on its hands, and many Geeks will be more than happy to pick one up.
The Core 2 architecture brings some really exciting additions to Intel's processor core. These are:
1. Wider execution (now four-way instead of three-way)
2. Smart Memory Access
3. Advanced Smart Cache
4. Advanced Digital Media Boost
5. Virtualization
6. EM64T
7. Execute Disable Bit
8. 14-stage pipeline (or less)
The Core 2 architecture's memory function is greatly enhanced via #2 and #3. Both of these abilities allow the processor to have more data fed to it when it is needed most. In addition, the shared cache could potentially allow more data to be in the cache were there multiple threads working on the same set of data. In other circumstances, it should be no worse off than having two separate 2 MB caches. I see both of these as big pluses for Intel's internal design.
Next we look at #1, #4, and #8. All of these go hand in hand, with #1 exposing more resources to the core, #4 allowing more rapid processing of SIMD data, and #8 allowing more work to be done per clock, with a nice balance between higher clock rates and work per clock. Again, these are big pluses for Intel's design.
Next we stare at #5, #6, and #7. #5 is a nifty ability that addresses the needs of servers primarily, but could also provide great utility for future applications. It allows a single processor to think it is the only thing running on the entire system by virtualizing those features that are typically allocated exclusively to a processor on systems without virtualization. This means Linux, Windows, and other operating systems can all be running at the same time, and at very near full-processor speeds, and each of them can think they have total control over the system. To have this ability today a program like VMWare or VirtualPC is required, and they emulate through software the abilities that can now be emulated in hardware.
#6 is Intel's 64-bit extension for its 32-bit architecture. It is a literal copy of AMD's AMD64 extensions and provides support for the future by allowing 64-bit operating systems to be run.
And last, #7 is a feature that can help prevent viruses from spreading. It has been added to the x86 ISA by AMD, VIA, and Intel, and prevents data downloaded from the Internet from being executed by mistake (or design), such as having "hidden code" inside a JPEG image. The "Execute Disable" bit will cause the processor to stop execution and signal the operating system that something's gone wrong with the program. It's arguable what utility this feature will have, but it is nice to see all three major x86 players using it.
The Core 2 architecture has much to be proud of and much to flaunt before the world. When released on July 27 it will be by far the fastest x86-based processor available to the general public.
Core 2's biggest weakness is still its shared bus architecture, however. And whereas Conroe will likely have no need for multi-processor scaling, the same Core 2 architecture will power upcoming Woodcrest systems for servers where, once again, Intel's shared bus architecture will prohibit it from attaining a set of scaling numbers that would truly benefit the power of Core 2's potential.
Source: http://www.geek.com/news/geeknews/2006Jul/bch20060720037449.htm
* Dual-core design . The CPU combines two independent cores working in parallel within the same packaging. These cores work at the same clock speed and share 2MB L2 cache. They are connected to the chipset using the same Quad Pumped Bus working at 1066MHz frequency and featuring 8.5GB/s bandwidth.
* Intel Wide Dynamic Execution . Each of the two processor cores can process four instructions per clock cycle.
* Intel Smart Memory Access . The enhanced data prefetch mechanism allows to reduce the idling time of the processor execution pipeline.
* Intel Advanced Smart Cache . Intellectual L2 cache is shared between the two processor cores depending on their load at the given moment of time. Moreover, the shared L2 cache speeds up data transfer rate between the cores and reduces the front side bus workload, because no data needs to be transferred via the system memory any more.
* Intel Advanced Media Boost . The processor works faster with SSE3 instructions because it can perform the binary operations with 128-bit SSE registers within one clock cycle.
* Intel Virtualization Technology (Intel VT) . This virtualization technology allows modeling the work of several virtual platforms on a single hardware system.
* Intel Enhanced Memory 64 Technology (Intel EM64T) . The processor supports x86-64 extensions that allow addressing over 4GB of system RAM and support the work with 64-bit general purpose registers.
* Execute Disable Bit . The OS is protected against harmful spyware and viruses that use “buffer overflow” error to gain control over the system.
* Lower heat dissipation and power consumption . Core 2 Duo processors are manufactured with the newest 65nm technological process. Thanks to their architecture and a number of power saving technologies they boast the typical heat dissipation of 65W.
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